1. Field of the Invention
The present invention relates to a charged particle system. In particular, it relates to a system suitable for checking for a difference between a pattern and a CAD pattern (an ideal pattern), for example.
2. Background Art
In inspection and analysis of a pattern on a semiconductor integrated circuit, the difference between the pattern on the semiconductor integrated circuit and computer aided design (CAD) data is examined. Design data, such as CAD data, specifies an ideal shape and a position of a semiconductor device, and therefore, position matching and shape matching can be conducted by using the CAD data. It is common practice to carry out position matching using the design data in inspection of a semiconductor integrated circuit. Furthermore, it is common practice to carry out matching based on image processing between a pattern formed on a semiconductor wafer that has a shape different from that of an ideal pattern specified by the design data due to the effect of the manufacturing process and the ideal pattern specified by the design data.
For example, the patent literatures 1 and 2 disclose detecting edges of an inspection-target pattern and a reference pattern using a critical dimension scanning electron microscope (abbreviated as CD-SEM, hereinafter) as an apparatus for inspecting a semiconductor integrated circuit using design data and comparing the detected edges to determine the amount of deformation of a pattern with respect to the design data. The CD-SEM is an apparatus that measures dimensions of a pattern formed on a sample based on a secondary electron produced when the sample is scanned with an electron beam. It is common practice to carry out position matching by comparing the pattern image formed by the CD-SEM or the like with CAD data.
Other semiconductor inspecting apparatus include a type that imaging a semiconductor wafer by perpendicularly irradiating the semiconductor wafer with a charged particle or light, such as an electron beam, from above and detects a defect from the acquired image and a type that uses the defect or failure detected by such a type of apparatus for more precise analysis.
Furthermore, there is a defect inspecting SEM or the like as an apparatus that images a semiconductor wafer from above and analyzes a defect or failure thereof.
For analysis of a defect or failure of a semiconductor device, a high-resolution SEM or a transmission electron microscope (TEM) is used. A sample piece introduced to such analysis apparatus is prepared using a focused ion beam (FIB) apparatus. The FIB apparatus has a powerful beam focusing capability and carries out fine processing using a sputtering phenomenon.
In general, the CD-SEM and the defect inspecting SEM perpendicularly image the wafer from above. In this case, design data is used. The design data for the semiconductor circuit stored in GDSII or other formats describes the circuit pattern viewed from above. Therefore, although the shape varies due to a problem with the semiconductor manufacturing process as described above, it is possible to relatively easily implement the semiconductor manufacturing process even with the methods of the patent literatures 1 and 2 by using the design data.
Patent literature 1: JP Patent Publication (Kokai) No. 2001-338304A (corresponding to U.S. Pat. No. 6,868,175)
Patent literature 2: JP Patent Publication (Kokai) No. 2002-31525A (corresponding to US2002/0015518)